CD3215 Bootup Sequence

Bold text==Getting 20V on the charger==

If a CD3215 does not have the LDO outputs, test the lines for shorts, otherwise the chip is missing power or bad. Data sheet of closest Ti chip.

A bad CD3215 can often cause a loop at step 10. All of the CD3215s need to be fully functional and communicate with the SMC before the CD3215 connected to the charger will request 20V.

The TBT ROM is required to get to 20V. It is powered by the CD3215 on the opposite side. It will not boot unless it can communicate. It seems with liquid in that area, the trace between the LDO of the CD3215 and TBT ROM gets damaged at the test point. Without communication with the TBT ROM, the 1.1V BMC LDO (PIN 35) won't come up while other LDOs will be present. The 1.1V BMC LDO is used to drive the logic negotiating USB-PD (USB 2.0 communications to charger). When that happens, when USB-C is connected to this CD3215, it will not negotiate 20V and get stuck on 5V, not cycling.

When one CD3215 in the system is bad, it will often cause others to not work as well, and they will often be power cycling after starting USB-PD negotiation as a result.

The CD3215 in one pair work in a master-slave fashion. For example on 820-00281, U3200 is the master while U3100 is the slave. The master is connected directly to the TBT ROM (U2890), while the slave (U3100) reads the TBT ROM firmware through the master (U3200). As a result, if the master (U3200) is not working properly, the slave (U3100) won't work either.

If all ports in all orientations are stuck at 5V, not power cycling, 1.1V BMC LDOs are good and the CC1/CC2 show good diode mode measurements, then there is probably an issue related to the communication between SMC and the USB-C controllers. Make sure to check that SMC_RESET_L and SMC_USBC_INT_L are properly pulled up to 3.3V.

Please note, the chip designations and net names are from an A1706.

Steps Before 20V on Charger
Step	Source	Name of Net	Voltage
1	J3300	PP20V_USBC_XB_VBUS	5V
2	U3200 (Check these voltages on each CD3215)	PP3V3_UPC_XB_LDO	3.3V
		PP1V8_UPC_XB_LDOA	1.8V
		PP1V8_UPC_XB_LDOD	1.8V
		PP1V1_UPC_XB_LDO_BMC (On active port after reading TBT ROM) BMC stands for "Binary Mark Code" which is a communication protocol for PD interface. Lack of this LDO is a clear indicator that either cd3215 is failed or its bootcode is corrupted	1.1V
3	U3200	HV_GATE1	High(5v, later 20V)(Air 10v, later 20V)
	U3200	HV_GATE2	High(5v, later 20V)(Air 7.8v, later 20V)
4	Q3200	PPDCIN_G3H	5V
5	U7000	TBA_VDDA (PPCHGR_VDDA)	5V
6	U7000	PM_EN_P3V3_G3H (NC_CHGR_EN_VR1)	3.3V (5V on many boards)
7	U6903	PP3V3_G3H	3.3V
8	U5000	PP1V2_G3H_SMC_VDDC or PP1V2_S5_SMC_VDDC	1.2V
9	U5165	PP3V0_G3H_AVREF_SMC or PP3V0_S5_AVREF_SMC	3.0V
9.1	U7000	SMC_RST	3.3v
10	U5000	SMBUS_SMC_4_G3H_SCL	3.3V (clock)
	U5000	SMBUS_SMC_4_G3H_SDA	3.3V (data)
11	U3200	USB_XB_CC1 (USBC_XB_CC1)	0.8V (data) (verify)
	U3200	USB_XB_CC2 (USBC_XB_CC2)	0.8V (data) (verify)
12	J3300	PP20V_USBC_XB_VBUS	20V
	J3300	PP20V_USBC_XB_VBUS	20V
13	J3300	HV_GATE1	>20V
	J3300	HV_GATE2	>20V
14	Q3200	PPDCIN_G3H	20V
15	R7015	TBA_AUX_DET	5V
16	U7000	SMC_RST_L	3.3 (verify)
17	U7000	Q7030 Q7040 opening	Unknown (low maybe)

Booting fully

Thunderbolt ROM is required to get 20V o as well as proper communication between all CD3215 chips, TBT Rom and SMC/T2. However, Thunderbolt controller itself might prevent TBT ROM from being read. TBT SPI chip is shared between CD3215 and TBT Controller, so if you have damage around TBT area, it would be a good idea to disconnect TBT IC from TBT SPI (instead of desoldering just move straps between TBT IC and TBT SPI. TBT Rom is only necessary on the side you have charger plugged in. If you remove TBT rom on inactive side, it will not prevent other side to switch into 20V(confirmed on T2 boards).

If you get a message saying Critical Update Required there may be a problem with the logic board.

After you remove an underfilled chip, it is a good idea to check all pads which have vias underneath it. Even if pad seem fine, there might be a broken via. Use Diode mode and check such lines as i2C_UPC_T_SDA/SCL/INT. almost all datalines are usually 0.4V voltage drop. By waterdamage check UPC_TA_DBG* pulldown resisters - if this line is floating, this will cause master not to read SPI ROM.

Diode measurnments on #CD3215C footprint

Troubleshooting Techniques

Extra Data

piernov 11.8.2020 at 9:29 AM

@ChrisB [VA, US] U3100/U3200 were 5V not cycling. U3200 was missing 1.1V BMC LDO. U3100 is missing it too, however it's the slave so it gets the TBT firmware through U3200 so that's normal. (I'm not sure if the slave could cause the master to have missing 1.1V BMC LDO though) At one point U3200 3.3V LDO was sending out 4.2V, so that was going to the TBT ROM (U2890) as well, I doubt it damaged it but it's a possibility. UB300 and UB400 were power cycling with 1.1V BMC LDO present, so they seem to be working fine, cycling being caused by the other pair.

→ Bad TBT ROM U2890 (1:24:00)

Satyrcon 11.12.2020

Issue: 820-00840 wont take anything from charger, either port, or orientation.

Visible inspection resulted in marks on CC1/2 pins on both USB-C ports.

Diode mode measurement showed ~0.550V on 3 of them, one ~0.040V.

Replacing the port fixed the issue.

Conclusion: One damaged CC pin can cause the whole lot to stop functioning.

Nrjnapu 08.05.2021

820-00840 and 820-00875: U3100/U3200 were 5V not cycling. All LDO voltages were present. If battery is connected goes to 20V but 0mA and PPDCIN_G3H is 0V because Q32100/Q3200 closed due to 0v on UPC_XA_GATE1/UPC_XB_GATE1 . SMBUS_SMC_4_G3_SCL and SMBUS_SMC_4_G3_SDA at Step10 were 3.42V without any pull down, i.e. no communication between SMC and U3100/U3200. Resolved by reflowing SMC chip on 820-00875 and SMC replacement in case of 820-00840. Conclusion: communication between SMC and U3100/U3200 should be checked at Step10 by using oscilloscope.

Dusten Mahathy 11.27.21

820-00928

5v and 100mA for about 10 seconds then would jump to 20v 60mA - PPBUS not being generated. Initially found short on SMBUS_SMC_5_G3_SDA caused by D6950. After diode replacement, same result. Resolved issue by replacing SMC.

Voltages I had

PPBUS_G3H - 0.300
PP3V3_G3H - 3.4
TBA_GATE_Q1 - 0
TBA_GATE_Q2 - 0
TBA_GATE_Q3 - 0
TBA_GATE_Q4 - 0
PPVIN_G3H_P3V3G3H - 19.8
TBA_AUX_DET - 5.07
HPWR_EN_L - 3.36
SMC_RESET_L - 3.4
TBA_VDDA - 5.07
TBA_VDDP - 5.07
PM_EN_P3V3_G3H - 5.08
PPDCIN_G3H_CHGR - 19.8
SMC_BC_ACOK - 3.4
CHGR_AMON - 0
CHGR_BMON - 0

Guruji 17.01.2022

820-01041

I had no shorts in anyone of the usbc ports

PP3V3_G3H_RTC_X 3.3V

PP3V3_UPC_XA_LDO 3.3V

USBC_XA_CC2 WAS GIVING ME COMMUNICATION ON OSCILLOSCOPE

USBC_XA_CC1 SAME WAS COMMUNICATING

UPC_XA_FAULT_XA FLAG IS 0V WHEN ANY PORTS ARE BAD

PP1V8_UPC_XA_LDO 1.8V

PP1V8_SLPS2R 1.76V

12C_TBT_XA_INT_L 1.8

PP1V1_UPC_XA_LDO_BMC 1.1V

I2C_UPC_XA_BDG_CTL_SDA 0.8V ERROR R3108

I2C_UPC_XA_DBG_CTL_SCL 1V ERROR R3109

SO THE RESISTORS WHERE BAD r3108 &R3109 ARE 1MEG WHICH GAVE ME WEIRD VALUES AND ALSO THESE RESISTOR MUCH BE PULLED UP WHICH THE TRACE TO PP3V3_UPC_XA_LDO WERE OPEN TRACE .

SOLUTION: CHANGED THE r3109 AND r3108 AND REPAIR THE TRACE GAVE ME 20v AND VOILA LAPTOP POWERED ON.

Leshuq 17.02.2022

Some words about 820-00840 and it's compatibility with different revisions of CD3215:

As we know, 820-00840 comes with CD3215C00 revision and won't accept anything else.

Recently I've got my way around this. I've got 820-00361 DVT board that came with factory B03 revision chips.

Board looks quite similar to 00840. In charging curcuitry I think the only difference it the TBT ROM, which is U2890.

So I decided to pull TBT ROM from 00361 and put it to 00840.

Well, that worked. Now my 00840 board accepts B01 and B03 revisions as well. Didn't tried putting back C00, though.

For those curious I've dumped the original contents of 00361 board's TBT ROM and uploaded them here.

IT-Solve - 13.09.2022

For Reference: I got A1708 00875 with blown CD3215B03 and replaced both with CD3215C00. Did not work as not cross-compatible. Following Leshuq's experience, swapped TBT ROM from 00840 which uses CD3215C00 onto the 00875 and did not work. Still stuck at 5V 0.02A

Crumblenaut - 16.09.2022

This page helps describe what USB-C power supplies need from USB-C devices in order to give ANY power on VBUS - namely a 5.1k pulldown resistance on BOTH the CC1 and CC2 pins, provided by the connected device. Until then, VBUS will provide no power - not even 5V.

If you're not getting ANY USB-C multimeter readings, check diode mode on the CC lines of your CD3215 (they'll typically read ~0.35V to ~0.5V) and see if one stands out from the others. These often just have a capacitor and a diode between them and ground, and so the requisite resistance to engage ANY power on the given port is provided by a functional CD3215. If the ports themselves aren't damaged, then the issue is most likely one or many CD3215's.

Note that the board that brought this to light for me is an A1707's 820-00281, and it had THREE ports that gave NO response to a USB-C power adapter via a multimeter, and ONE port that worked perfectly at 20V to power and charge the system.

This also suggests that if you have any one CD3215 that's causing the system to stick at 5V, then it can prevent any of them from switching to 20V... but as long as you have a functional master CD3215 to TBT ROM connection and the others are failed to the point that they won't trigger any voltage input from a power supply, then the system may be able to function on that one port.

Please take the information in my comment here with a grain of salt until it's verified further. ;)