Pulsing every 2 seconds is typically SPI ROM communication issue. Pulsing once or twice can be sensor issue, try SMC bypass and double check charger circuit current sensing (resistance between pin 17/18 and 27/28 of U7100). There can also be an issue with some power rails such as a short to ground on S3/S0 rail. One thing that can happen is the DDR voltage regulator boost test point gets eaten away, that will cause single but longer spike. There are a few other things such as issue with U1950 and PCH HSIO switch. Don't remember the exact symptoms they cause though.
So yeah, can be a lot of things. Inspect very carefully the board for any corrosion, broken traces or test points…
And never forget J6100. (no need to destroy it everytime, but at least inspect and clean it)
Probably power cycling when U1930 is on the board.
(if U1930 is not on the board, the CPU will not start so SPI ROM won't matter)
Usually communication issue with SPI ROM If you have an oscilloscope you can check for activity on BIOS CS# pin also 2ms is no communications around 200ms is success. There should be intermittent bursts after that.
ME: 8.2v on an Air PPBUS means no SMC right? I've got a board that was supposedly liquid damaged by the end user. Board is really dirty but no signs of corrosion anywhere. I have no green light on charger. I'm tracking through the amazing 00165 diagram. I have 3.42 at SMBUS_SMC_5_G3_SDA and SCL. SMC_RESET_L is 3.3 What am I missing in the SMBUS 5 comm? Junk under SMC or bad SMC? Also of note, SDA and SCL stay high. There is no clock or data that I can see. no SYSCLK_CLK25M_SB either. I'm not sure when that comes in.
"Junk under SMC or bad SMC?" → most likely
Thanks. 25Mhz is when the PCH wakes up?
On this board it doesn't even matter as it's only used for some peripherals. The PCH has its own 24MHz crystal (that does matter in S0 state)
Louis Rossmann: CPU_VCCST_PWRGD area being low would cause 500 ma then 24 ma, spiking three times, then dead.
Piernov: Check if CPU VCore pulses too. If it doesn't, check for a pulse on ALL_SYS_PWRGD and PM_PCH_SYS_PWROK.
If CPU VCore pulses, you most likely have an issue with SPI ROM, or SPI resistors and traces (or stuff on J6100).
If CPU VCore and PM_PCH_SYS_PWROK don't pulse, but ALL_SYS_PWRGD does, you have an issue with U1950 circuit.
Nobluesky: 820-00165-A. Refurb Apple.
Green->Orange, no reaction pwrbutton. Oscillates twice between 300-500mA, then 2-3 times 15-22 then settles at 22mA
Pin 4 bios solder starved. Pin 9&10 U7501 dirty
CPU_VCORE res to gnd 17.8 Ohms. No short between PPBUS and VCORE (12M)
piernov: If it goes up to 500mA then CPU VCore should at least come up at some point (so SLP_S4# necessarily comes up as well). Try SMC bypass.
Nobluesky: fan starts twice for 1s with 5s pause inbetween. Subsequent presses generate one 1s spin, not two. VCORE turns on for a split second.
piernov: Check charging circuit current sensing
Nobluesky: R7121 & R7122 are 10.6 10.4 Ohms. No broken path. No short. R7152 0.4 and R7151 2.9 Ohms. Not the ISL.
Missing enable on pin4 and S4_PWR_EN.
piernov: you're not missing S4 since CPU VCore comes up.
Nobluesky: What makes Vcore and rails come down again... Checking for shorts again on S4, maybe I missed something.
neola: current sense I might say
piernov: Yes, current sensing can cause that. And some other stuff such as an event happening on a power rail later in the power sequence. Maybe even EFI.
neola: SMC_PBUS_VSENSE is a signal you might want to look at
piernov: PPBUS_G3H and PPDCIN_G3H voltage sensing should be disabled when starting in SMC bypass mode (although I'm not 100% sure of that)
Nobluesky: Seeing it doesn't come on with SMC bypass, the issue is deeper. Gonna get a dirty SPI rom
piernov: You can check the usual signals at the end of the power sequence like SYSPWROK, VCCST_PGOOD, PLTRST#… And the PCH HSIO rail, IIRC it doesn't have a power good signal associated with it but can be causing issues.
Nobluesky: PLT_RESET_L "blinking" on too.
Nobluesky: Known good EFI, no change. No fan spin. With SMC bypass, quarter fan spin two times. All subsequent presses on power button give another quarter fan spin. As a reminder, EFI CS pin looks like this (and stays up afterwards, there is no more communication after that, so I trucated it).
piernov: @Paul L Daniels fixed his with the USC.
ChrisB: Did you check all SPI resistors @Nobluesky? Traces?
Nobluesky: SPI resistors all good. Traces too of course. I swapped U6101 already.
piernov: Or an issue on one of the SPI ROM line when trying to work in Quad SPI mode maybe.
Nobluesky: Okay, not the SMC.
ChrisB: Maybe PCH issue. It was basically bootlooping as soon as the PCH got power right?